This is more a question for @keesj
Wouldnât a better close up from two sides of this board help? But some people like to sneak stuff below connectors. Measuring could also help, I assume.
If someone can make some crazy high-rez macro of those components above the connector I can have a look at it
Iâve got a USB microscope in the lab. Works great for identifying really small SMD components.
Nice! Use it please
Itâll be tomorrowâŚ
Hmm, dismantled the phone, but I need to go a level deeper to access the back of the mainboard. How easy is that last part? I ran out of time.
2 min
At least that is what they claim
Youâll need a small torx screwdriver.
I donât mean to spam this forum⌠I am interested in getting a response to my questions regarding building internal hardware for the Fairphone 2. Should I ask these questions elsewhere?
Thanks for you help.
Y-
What questions you need answered???[quote=âYileKu, post:52, topic:11457â]
I want to know if the specs for the network interface are open or if there is a USB hub in the phone that is accessible.
[/quote]
Not that I know of, weâll have to wait for official dev kit
I dont know what you mean here.
Also, donât get what you mean
No. Wait for official dev kit.
7 posts were split to a new topic: Fairphone 2: Photos of the components around the charge input
Do these links help?
That repo by @keesj is cool, I love that USB breakout for the yubikey
@dvlâs work featured heavily in @keesjâs FOSDEM Talk, great to see Fairphone support their community like that
Finally had time to do some measuring. All Bat-Voltages are taken by removing the bat from the phone.
Case a)
-No Charger connected
-Battery Voltage at 4.12V
-Phone turned on
Charge is at 0V
VBUS is at 3.90V
Case b)
-Charger (Laptop)
-Battery @ approx 4.1V
-Phone is âoffâ
Charge pin @ 0V
VBUS pin @ 3.99V
Case c)
-Charger (Laptop)
-Battery @ approx 4.1V
-Phone is âoffâ
Charge pin @ 0V
VBUS pin @ 3.94V
Case d)
-Bat fully charged (says Phone) @ 4.31V
-Almost no difference if FP is on/off and charger is dis-/connected
VBUS @ 4.12V
My personal understanding of this is, that there is a Schottky diode (or something similar) between VBUS and Bat+ => You can not charge via VBUS, you wonât get higher Voltages than ~4.15V.
Charge is always at 0V. With a conductivity test I get a reading of about 1.4V for the voltage drop between the Charge-pin and Bat+. This lets me believe, that there is some kind of regulator in between.
Surprisingly I got an almost perfect conductivity test between (GND)->(VBUS). This might be some kind of protection against wrong polarisation? But that would fry the PCB if enough power was connected, right? Nothing like that between (GND) and (Charge).
Bit quite from my side, was chilling on ther beach in Chile, but had some time to make some fluffy text to fill my github.
Should go online sooooon. Lots of incomplete infos btw, just so you guys and gals know.
Hello,
VBUS is conected to the PMICâs charge pump (the same one delivering 5V when using USB OTG). It is not possible to charge via that pin.
The charge pin allows charging it is connected to the secondary charge pin(DC_IN) of the 8941 PMIC.
Thanks keesj!
I could not get 5V on that pin, even if drawing power. Do I have to connect a usb device to negotiate a protocol first? Is there a possibility to draw 5V from that pin without usb controller? Is it okay to draw power from that pin without having a usb connection negotiated? What is the maximum rating either way?
Btw: is there a datasheet for that chip? I could not find oneâŚ
jftr,
Thanks for the files. I am going through them. Is there a general overview of how extension modules go into the fairphone? I will need to convert the CAD files to SolidEdge to get a better look.
Thanks,
Y-